1. Field of the Invention
The present invention relates to a cell projection technique using an electron beam and, more particularly, to forming a fine pattern on a semiconductor wafer with a high accuracy in the cell projection process.
2. Description of a Related Art
With the development of semiconductor devices typically known as Large Scale Integrated-Circuits (LSIs) finer patterning technique is rapidly advanced in the fabrication procedure of the semiconductor devices. In a lithographic process in the fabrication, an electron beam exposure technique is expected to afford finer patterning compared to the conventional optical exposure, achieving as low as 0.25 xcexcm rule or less suited for next generation semiconductor devices.
FIG. 1 schematically shows a typical electron beam exposure system using a cell projection (block exposure) technique, together with some details of the exposure system. In the exposure system, an electron beam 50 ejected by an electron gun 101 is shaped using a first mask plate 103 having a single rectangular aperture 103A, and then patterned or further shaped by a second mask plate 106 having a plurality of rectangular apertures 106A to 106E and a single rectangular aperture 106F. The electron beam 50B passed by the second mask plate 106 generally has plural beam shapes corresponding to one of the patterns formed in the apertures 106A to 106E. The electron beam 50B is incident onto a photoresist film formed on a semiconductor wafer 11, thereby forming a fine pattern thereon.
The electron beam 50 consecutively passes a blanking electrode 102, the first aperture 103, a shaping lens 104, a shaping deflector 105, the second aperture 106, a demagnification lens 107, a main deflector 108, a sub deflector 109 and an objective lens 110 to reach the semiconductor wafer 11 mounted on a sample stage 12.
The first mask plate 103 having the aperture 103A shapes the electron beam 50 to form a rectangular electron beam 50A. The second mask plate 106 having apertures 106A to 106E, which are generally called cells or cell apertures, passes the rectangular electron beam 50A at selected one of the cell apertures 106A to 106E. Thus, as exemplified in the drawing, an electron beam 50B having a pattern shape provided by one of the apertures 106A to 106E is incident onto a photoresist film formed on the semiconductor wafer 11. The patterns on the cell apertures 106A to 106E include a contact-hole pattern and line-and-space pattern, for example, defined by design data (or Computer Assisted Design (CAD) data) for the semiconductor device.
The pattern data is generally converted into a format suited for the electron beam exposure system and then stored in a storage device 15 from outside the exposure system. A CPU 14 reads the pattern data through a bus 13 from the storage device 15, temporarily stores the same in a pattern data memory 17, and conducts processing to the pattern data such as expanding or sorting of the pattern data. The pattern data thus processed is transferred through a control unit 16 to the blanking electrode 102, shaping deflector 105, main deflector 108 and sub deflector 109, thereby irradiating the electron beam 50B or 50C having desired patterns to the desired location of the semiconductor wafer 11. The main deflector 108 and the sub deflector 109 function for shifting the image of the cell apertures with respect to the semiconductor 11. The shaping deflector 105 shifts the electron beam 50A on the mask plate 106 for aligning a selected one of the cell apertures 106A to 106E and the variably shaped beam aperture 106F to the electron beam 50B for cell projection and variably shaped beam 50C on the semiconductor wafer 11.
The second mask plate 106 has aperture 106F having a single rectangular thereon and used for a variably shaped shot which is attained by narrowing the sectional area of the electron beam 50A. Thus, an electron beam 50C having desired dimensions may be incident onto the semiconductor wafer 11 instead of the electron beam 50B having plural patterns therein, as illustrated in FIG. 1.
The cell projection technique as described above affords reduction of the number of exposure shots down to {fraction (1/10)} to {fraction (1/100)} of the number of exposure shots used in the conventional variably shaped electron-beam exposure system. Thus, the cell projection technique improves the throughput in the conventional variably shaped electron beam exposure system. In addition, the dimensions of the electron beam 50B after passing through the second mask plate 106 are stable and accurate due to the dimensions of the apertures 106A to 106E, whereby a reliable pattern having accurate dimensions can be obtained.
The electron beam 50B having a desired pattern shape therein is deflected by the main deflector 108 and the sub deflector 109 and incident onto desired location of the semiconductor wafer 11.
For a DRAM, each of the cell apertures 106A to 106E may have a basic unit pattern, which is consecutively transferred onto different locations of the semiconductor wafer 11 to define a single overall pattern in the wafer 11. In semiconductor devices, especially in the case of DRAM, if a misalignment occurs at the stitching boundary between adjacent shot areas due to a poor deflection by the deflectors 108 and 109 in the exposure system, the resulting overall pattern has a defect at the stitching boundary such as a distortion, disconnection or overlapping in the pattern. These defects may cause a functional error in the resultant semiconductor devices, and must be eliminated by using a suitable offset value for a reliable operation.
The term xe2x80x9coffset valuexe2x80x9d as used herein means a correction amount to be applied for correcting the deviation at the stitching boundary between adjacent shot areas. In fact, if the adjacent areas are exposed by using the CAD data as it is, a variety of factors cause deviations at the stitching boundary between the shot areas in the resultant pattern.
Patent Publication JP-A-11-40482 proposes for solving the above problem, wherein a basic unit pattern in the CAD data is modified so that a single exposure shot does not include divided patterns which are included in a single-piece pattern. This is achieved by shifting the exposure area in the mask plate to include the whole single-figure pattern in the exposure area while maintaining the size of the exposure area.
The proposed technique may be effective to eliminate deviation at the stitching boundary so long as the single-piece pattern is concerned. However, this technique does not afford elimination of the deviation between the exposed area and the non-exposed area. Conventional techniques for solving such a deviation problem include one using a mask plate 106, such as shown in FIG. 2, including adjustment apertures 106G to 106K each, having an adjustment pattern thereon used for correction of the shot location using a corresponding one of the cell apertures 106A to 106E. The pattern includes a first adjustment section for Y-direction and a second adjustment section for X-direction. FIG. 3 shows an exposure process using the mask plate 106 of FIG. 2. In the exposure process, the mask plate 106 is first mechanically shifted to the area of the adjustment apertures 106G to 106K (step S), followed by a trial exposure through the adjustment apertures 106G to 106K to a test wafer (step S2) by using a cell projection technique and a variably shaped technique 106F. FIG. 4 shows the result of the trial exposure, wherein master scales 21 (hatched portions) are formed by the cell projection shot and the vernier scales 22 (stained portions) are formed by the variably shaped 106F shot. The offset value (Sx, Sy) is then calculated based on the dimensions of the vernier scales 22 with respect to the master scales 21 (step S3). The mask plate 106 is then mechanically shifted to the area of the cell apertures 106A to 106E (step S4), followed by electron beam exposure of the semiconductor wafer based on the CAD data while as applying a correction based on the offset value (Sx, Sy) for canceling the deviation (step S5).
In the conventional technique as described above, the offset value obtained by the trial exposure through the adjustment aperture in fact deviates from the optimum offset value to be used in the cell projection through the cell apertures, due to an error caused by the mechanical shift of the mask plate 106 between the adjustment apertures 106G to 106K and the cell apertures 106A to 106F.
Patent Publication JP-A-6-163378 describes a technique, such as shown in FIG. 5, wherein one of the cell apertures is aligned to the electron beam by mechanical shifting a mask plate (step S6), followed by a cell projection shot of a reference mark on the stage (step S7) through the selected cell aperture. By processing the signal obtained from the electron beam reflected at the reference mark, an offset value (Sx, Sy) for the cell projection is calculated (step S8), which is then used for the actual cell projection to the semiconductor wafer (step S9).
In the technique described in the publication, however, the reference mark does not always afford an optimum offset value, because detected waveform of reflected electrons is often deformed due to contamination or abrasion of the reference mark, which makes a location of the reference mark erroneous. As a result, an optimum offset value cannot be obtained.
In view of the above, it is an object of the present invention to provide a method for use in a cell projection process, which is capable of determining an optimum offset value for correcting stitching error at the stitching boundary between adjacent shot areas.
The present invention provides a method for aligning a beam passing through a cell aperture with a designed location in a cell projection process, comprising the steps of selecting from design data first and second pattern data for cell projection of first and second shot areas, respectively, calculating a coordinate difference between coordinates of the first area and coordinates of the second area, passing a beam through a first cell aperture having the first pattern data to obtain a first shot area, passing a beam through a second aperture having the second pattern data by using the coordinate difference to obtain a second shot area so that the second shot area is located at a design difference with respect to the first shot area, calculating an offset value based on a difference between the design difference and an actual difference, conducting a plurality of cell projections using at least the first cell aperture and the second cell aperture to a semiconductor wafer based on the design data and the offset value.
In accordance with the method of the present invention, the offset value can be obtained from the same cell apertures used for actual cell projection, whereby the costs for the mask plate having no adjustment pattern thereon can be reduced. In addition, since the mask plate is not mechanically shifted between the trial exposure and the actual cell exposure, an error caused by the mechanical shift as encountered in the conventional process can be eliminated. Thus, the accuracy in the cell projection can be improved.